eeprom: control logic: define instructions layout and write out script

1 files changed, 90 insertions, 0 deletions

diff --git a/inst.py b/inst.py
new file mode 100644
index 0000000..4d56770
--- /dev/null
+++ b/inst.py
@@ -0,0 +1,90 @@
+## Hard wired locations of the control signals
+SIG_REG_A_OUT = 0x1
+SIG_ALU_OUT = 0x2
+SIG_REG_B_OUT = 0x4
+SIG_PC_OUT = 0x8
+SIG_PC_TICK = 0x10
+SIG_PC_LOAD = 0x20
+SIG_ALU_SUB = 0x40
+SIG_MEM_ENABLE = 0x80
+SIG_MEM_DIR_OUT = 0x100
+SIG_INST_OUT = 0x200
+SIG_INST_IN = 0x400
+SIG_MEM_ADDRESS_IN = 0x800
+SIG_REG_A_IN = 0x1000
+SIG_REG_B_IN = 0x2000
+SIG_HEX_OUT = 0x4000
+
+## Define control word for common micro instructions
+MICRO_INST_MEM_TO_REG_A = SIG_REG_A_IN | SIG_MEM_DIR_OUT | SIG_MEM_ENABLE
+MICRO_INST_MEM_TO_REG_B = SIG_REG_B_IN | SIG_MEM_DIR_OUT | SIG_MEM_ENABLE
+MICRO_INST_PC_TO_REG_MEM_ADDRESS = SIG_MEM_ADDRESS_IN | SIG_PC_OUT
+MICRO_INST_MEM_TO_INST = SIG_INST_IN | SIG_MEM_DIR_OUT | SIG_MEM_ENABLE
+
+## max number of micro instructions a macro instruction can have
+MAX_MICRO_OPS = 6
+
+## the last four bits of this OP is loaded into the REG A
+INST_LDA = 0x10
+INST_MICRO_OP_LDA = [SIG_INST_OUT | SIG_REG_A_IN]
+
+## the last four bits of this OP is loaded into the REG B
+INST_LDB = 0x20
+INST_MICRO_OP_LDB = [SIG_INST_OUT | SIG_REG_B_IN]
+
+## this instruction show the content of REG A on the 7hex display
+INST_REG_A_OUT = 0x30
+INST_MICRO_OP_REG_A_OUT = [SIG_REG_A_OUT | SIG_HEX_OUT]
+
+## this instruction show the content of REG B on the 7hex display
+INST_REG_B_OUT = 0x40
+INST_MICRO_OP_REG_B_OUT = [SIG_REG_B_OUT | SIG_HEX_OUT]
+
+## this instruction adds the content of REG_A and REG_B and saves the result in 
+## REG_A
+INST_ADD_A = 0x50
+INST_MICRO_OP_ADD_A = [SIG_ALU_OUT | SIG_REG_A_IN]
+
+## this instruction adds the content of REG_A and REG_B and saves the result in 
+## REG_B
+INST_ADD_B = 0x60
+INST_MICRO_OP_ADD_B = [SIG_ALU_OUT | SIG_REG_B_IN]
+
+## this instrcutions substracts the content of REG_A and REG_B and saves the 
+## result in REG_A
+INST_SUB_A = 0x70
+INST_MICRO_OP_SUB_A = [SIG_ALU_SUB | SIG_ALU_OUT | SIG_REG_A_IN]
+
+## this instrcutions substracts the content of REG_A and REG_B and saves the 
+## result in REG_A
+INST_SUB_B = 0x80
+INST_MICRO_OP_SUB_B = [SIG_ALU_SUB | SIG_ALU_OUT | SIG_REG_B_IN]
+
+## this loads a new PC value
+## the last for bits of this instruction are loaded into the REG PC
+INST_PC_LOAD = 0x90
+INST_MICRO_OP_PC_LOAD = [SIG_INST_OUT | SIG_PC_LOAD]
+
+## halt instruction
+## no new fetch cycle of the next instruction halts the PC
+INST_HLT = 0xe0
+INST_MICRO_OP_HLT = [0x0000]
+
+INST_RESET = []
+
+## fetch the instrcution itself from memory, and increment PC
+INST_MICRO_OP_FETCH_INSTRUCTION = [MICRO_INST_PC_TO_REG_MEM_ADDRESS, 
+		MICRO_INST_MEM_TO_INST | SIG_PC_TICK]
+
+## list of all implemented instructions
+## Mapping between instruction and control signals
+INST = [[INST_LDA, INST_MICRO_OP_LDA],
+	[INST_LDB, INST_MICRO_OP_LDB], 
+	[INST_REG_A_OUT, INST_MICRO_OP_REG_A_OUT],
+	[INST_REG_B_OUT, INST_MICRO_OP_REG_B_OUT],
+	[INST_ADD_A, INST_MICRO_OP_ADD_A],
+	[INST_ADD_B, INST_MICRO_OP_ADD_B],
+	[INST_SUB_A, INST_MICRO_OP_SUB_A],
+	[INST_SUB_B, INST_MICRO_OP_SUB_B],
+	[INST_PC_LOAD, INST_MICRO_OP_PC_LOAD]
+	]